# Hardware-Software Co-Design for Efficient LLM Inference on PCIe-Based FPGAs Using Coarse-Grained Systolic Arrays

**Authors:** Chang
**Year:** 2025
**DOI:** 10.1109/socc66126.2025.11235351
**URL:** https://doi.org/10.1109/socc66126.2025.11235351

## Abstract

No abstract available in source

## Citation Details

Hardware-Software Co-Design for Efficient LLM Inference on PCIe-Based FPGAs Using Coarse-Grained Systolic Arrays
**Authors**: Chang
**Year**: 2025
**DOI**: 10.1109/socc66126.2025.11235351
**URL**: https://doi.org/10.1109/socc66126.2025.11235351  # Truncate if very long

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