# Appendix A: Conceptual Framework for Quantization

## A.1 Mathematical Foundations of Integer Mapping

The transition from floating-point representation to integer-only arithmetic necessitates a rigorous mathematical framework to ensure signal fidelity. As established in the main body, the fundamental operation involves mapping a real-valued tensor $X_f$ to an integer tensor $X_q$. This appendix details the specific mechanisms of affine quantization, symmetric versus asymmetric mapping, and granularity strategies that define modern post-training quantization (PTQ) approaches.

### A.1.1 Affine Quantization Schemes
The standard affine quantization scheme, often referred to as uniform quantization, is defined by two primary parameters: the scaling factor ($S$) and the zero-point ($Z$). These parameters determine how the dynamic range of the floating-point values is compressed into the discrete integer domain.

The quantization function $Q(x)$ and dequantization function $D(x_q)$ are formally expressed as:

$$Q(x) = \text{clamp}\left(\lfloor \frac{x}{S} \rceil + Z, q_{min}, q_{max} \right)$$

$$D(x_q) = S(x_q - Z)$$

Here, $\lfloor \cdot \rceil$ denotes the rounding-to-nearest operation. The clamping function restricts the values to the representable range of the target bit-width $b$, where typically $q_{min} = -2^{b-1}$ and $q_{max} = 2^{b-1} - 1$ for signed integers.

| Scheme | Definition of Scale ($S$) | Definition of Zero-Point ($Z$) | Primary Use Case |
|--------|---------------------------|--------------------------------|------------------|
| Symmetric | $S = \frac{\max(|x_{min}|, |x_{max}|)}{q_{max}}$ | $Z = 0$ (Fixed) | Weight Quantization |
| Asymmetric | $S = \frac{x_{max} - x_{min}}{q_{max} - q_{min}}$ | $Z = \lfloor q_{min} - \frac{x_{min}}{S} \rceil$ | Activation Quantization |
| Logarithmic | $S = 2^k$ (Power of 2) | $Z = 0$ | Hardware Efficiency |

*Table A.1: Comparison of quantization mapping schemes. Source: Adapted from synthesis of {cite_021} and {cite_043}.*

Symmetric quantization is generally preferred for weights because the distribution of weights in neural networks, including Transformers, tends to be Gaussian-like and centered around zero. Enforcing $Z=0$ reduces the computational overhead during matrix multiplication, as the cross-terms involving the zero-point vanish. This efficiency is critical for hardware accelerators utilizing systolic arrays, as discussed by Wang et al. {cite_018} and Chang {cite_024}.

Conversely, activations often exhibit skewed distributions, particularly after ReLU or GeLU functions where values are non-negative. In such cases, asymmetric quantization is necessary to fully utilize the available bit depth. However, this introduces additional computational complexity during inference, as the zero-point must be calculated and subtracted during the accumulation phase.

### A.1.2 Granularity of Quantization Parameters
A critical factor in preserving the accuracy of Large Language Models (LLMs) is the granularity at which the scaling factors $S$ and zero-points $Z$ are calculated. The choice of granularity represents a trade-off between memory compression and model accuracy.

**Tensor-wise Quantization:**
This approach calculates a single $S$ and $Z$ for the entire tensor. While this offers the maximum compression ratio, it is often insufficient for LLMs due to the high dynamic range variance across different channels or tokens.

**Channel-wise Quantization:**
Commonly applied to weights, this method assigns a distinct scale factor to each output channel of a weight matrix. This accommodates the varying magnitudes of filters within the network.

**Token-wise and Group-wise Quantization:**
For activations in Transformers, outliers often appear in specific tokens or feature dimensions. Dettmers et al. {cite_006} demonstrated that outlier features in LLMs (e.g., GPT-3, OPT) are systematic and can be handled by vector-wise quantization or mixed-precision decomposition. Similarly, group-wise quantization divides tensors into smaller blocks (e.g., 128 elements) to localize the scaling parameters, reducing the impact of outliers on the global distribution.

## A.2 Advanced Optimization Objectives

Beyond simple rounding, advanced PTQ methods utilize optimization algorithms to minimize the information loss incurred by quantization.

### A.2.1 Hessian-Based Optimization
Simple rounding to the nearest integer is not always optimal for minimizing the task loss. Methods like GPTQ {cite_009} and Q-BERT {cite_011} utilize second-order information from the Hessian matrix (or its approximation) to determine the optimal quantized weights. The objective function seeks to minimize the squared error between the output of the full-precision layer ($WX$) and the quantized layer ($\hat{W}X$), weighted by the Hessian $H$:

$$\min_{\hat{W}} || WX - \hat{W}X ||^2_2 \approx \min_{\hat{W}} (\hat{w} - w)^T H (\hat{w} - w)$$

This approach acknowledges that not all weights contribute equally to the output error. Weights corresponding to high-curvature directions in the loss landscape (large eigenvalues in the Hessian) must be quantized more carefully than those in flat regions.

### A.2.2 Activation-Aware Scaling
Recent developments, such as AWQ {cite_013}, shift the focus from minimizing weight error to preserving activation distribution. The core insight is that the quantization error of weights should be weighted by the magnitude of the activations they multiply. By protecting "salient" weights—those corresponding to large activation magnitudes—performance can be significantly retained without requiring gradient updates or retraining.

# Appendix B: Supplementary Data Tables and Hardware Specifications

## B.1 Theoretical Resource Requirements for LLM Inference

The deployment of LLMs on edge devices is fundamentally constrained by memory bandwidth and capacity. The following tables provide a theoretical analysis of resource requirements for common open-source LLM architectures when subjected to different quantization precisions. These calculations are derived from the architectural specifications discussed in {cite_009} and {cite_036}.

| Model Class | Parameters | Precision | Model Size (GB) | Min. Bandwidth for 20 tok/s |
|-------------|------------|-----------|-----------------|-----------------------------|
| Llama-7B | 7 Billion | FP16 (16-bit) | ~14.0 GB | 280 GB/s |
| Llama-7B | 7 Billion | INT8 (8-bit) | ~7.0 GB | 140 GB/s |
| Llama-7B | 7 Billion | INT4 (4-bit) | ~3.5 GB | 70 GB/s |
| Llama-13B | 13 Billion | FP16 (16-bit) | ~26.0 GB | 520 GB/s |
| Llama-13B | 13 Billion | INT4 (4-bit) | ~6.5 GB | 130 GB/s |

*Table B.1: Theoretical memory footprint and bandwidth requirements. "Model Size" includes parameters only; actual runtime memory requires additional buffer for KV-cache and activations.*

As illustrated in Table B.1, 4-bit quantization (INT4) is a critical enabler for deploying 7B and 13B parameter models on consumer-grade or edge hardware. For instance, a Llama-7B model in FP16 requires approximately 14 GB of VRAM, exceeding the capacity of many standard GPUs and almost all embedded devices. In contrast, the INT4 representation reduces this to 3.5 GB, fitting comfortably within the memory constraints of devices like the NVIDIA Jetson Orin or high-end mobile SoCs {cite_034}. The bandwidth requirement column highlights the "memory wall" problem: to achieve a conversational token generation rate (e.g., 20 tokens/second), the memory bandwidth requirements scale linearly with bit precision.

## B.2 Hardware Accelerator Specifications for Edge AI

To contextualize the feasibility of integer-only inference, it is necessary to examine the specifications of current hardware accelerators targeted for edge deployment. The shift toward Edge AI {cite_034} relies on these platforms supporting low-precision arithmetic (INT8/INT4).

| Platform | Architecture | AI Performance (TOPS) | Precision Support | Power |
|----------|--------------|-----------------------|-------------------|-------|
| NVIDIA Jetson Orin | Ampere GPU | Up to 275 | FP16, INT8 | 15-60W |
| Google Coral TPU | ASIC | 4 | INT8 (Fixed) | 2W |
| Xilinx Versal AI | FPGA/ACAP | Scalable | INT8, INT4, Custom | Varied |
| ARM Cortex-A (NPU) | CPU/NPU | 10-50 | INT8, BF16 | <5W |

*Table B.2: Comparative specifications of Edge AI hardware accelerators. Source: Compiled from {cite_034}, {cite_035}, and {cite_043}.*

Table B.2 highlights the hardware diversity in the edge ecosystem. While GPU-based solutions like the Jetson Orin offer flexibility with mixed precision (FP16/INT8), dedicated ASICs like the Google Coral TPU are strictly limited to INT8 operations. This rigid constraint necessitates robust quantization strategies that do not rely on runtime floating-point scalars. Furthermore, FPGA solutions {cite_016}{cite_024} offer the unique capability to implement custom bit-widths (e.g., INT3 or INT2) or non-standard formats, allowing for co-design of the hardware and the quantized model. The support for INT4 is becoming increasingly standard in newer NPU architectures, driven by the specific needs of Generative AI workloads {cite_041}.

## B.3 Comparison of Post-Training Quantization Methodologies

The following table synthesizes the key characteristics of prominent PTQ algorithms discussed in the literature review.

| Method | Target Precision | Outlier Handling | Calibration Cost | Reference |
|--------|------------------|------------------|------------------|-----------|
| LLM.int8() | INT8 | Mixed-precision decomposition | Low (Inference-time) | {cite_006} |
| GPTQ | INT4/3 | Hessian-based error min. | Moderate (One-shot) | {cite_009} |
| AWQ | INT4/3 | Activation-aware scaling | Low (Search-based) | {cite_013} |
| Q-BERT | Mixed | Hessian spectrum analysis | High (Group-wise) | {cite_011} |
| SmoothQuant | INT8 | Math. equivalent scaling | Low (Offline) | {cite_023} |

*Table B.3: Overview of quantization algorithms. Note: "Calibration Cost" refers to the computational overhead required to determine quantization parameters.*

LLM.int8() {cite_006} is unique in its runtime approach to outliers, separating them into a 16-bit stream while quantizing the bulk of the vector to 8-bit. This preserves accuracy but incurs a latency penalty due to kernel launch overheads. In contrast, GPTQ {cite_009} and AWQ {cite_013} focus on optimizing the weight representation offline, allowing for efficient integer-only kernels during runtime. The approach by Q-BERT {cite_011} demonstrates the utility of Hessian information even in smaller Transformer models, a concept that GPTQ scaled to billions of parameters.

# Appendix C: Glossary of Terms

**Activation Outliers**
Feature dimensions in neural network layers that exhibit magnitudes significantly larger (often 100x) than the surrounding values. In Transformer models, these outliers are systematic and critical for performance. If truncated during quantization, model accuracy degrades largely. Techniques like LLM.int8() {cite_006} and SmoothQuant {cite_023} specifically address this phenomenon.

**Affine Quantization**
A mapping scheme where real values are approximated by integers using a linear transformation defined by a scale factor ($S$) and a zero-point ($Z$). This is the standard arithmetic used in INT8 inference on most hardware accelerators.

**Calibration**
The process of determining the optimal quantization parameters (scale and zero-point) for activations. This typically involves passing a small set of representative data (calibration set) through the model to observe the dynamic range of activation tensors.

**Edge AI**
The deployment of artificial intelligence algorithms on local devices (e.g., smartphones, IoT sensors, embedded systems) rather than centralized cloud servers. This paradigm reduces latency, bandwidth usage, and privacy risks {cite_034}.

**FPGA (Field-Programmable Gate Array)**
An integrated circuit designed to be configured by a customer or a designer after manufacturing. FPGAs are increasingly used for LLM inference due to their ability to support custom precision arithmetic and variable bit-widths {cite_016}{cite_035}.

**Hessian Matrix**
A square matrix of second-order partial derivatives of a scalar-valued function. In the context of quantization (e.g., GPTQ {cite_009}, Q-BERT {cite_011}), the Hessian of the loss function with respect to the weights indicates the sensitivity of the model to perturbations (errors) in those weights.

**Inference**
The phase where a trained model is used to make predictions or generate text based on new input data. Quantization primarily targets the optimization of the inference phase to reduce cost and latency.

**Mixed-Precision Inference**
A technique where different parts of a model or different operations are computed at varying precisions. For example, storing weights in INT4 while performing accumulation in FP16, or dealing with outliers in FP16 while the rest of the matrix multiplication occurs in INT8 {cite_006}{cite_017}.

**Post-Training Quantization (PTQ)**
A quantization technique applied after the model has been fully trained, requiring little to no retraining. PTQ is preferred for LLMs due to the prohibitive cost of retraining massive models. Methods like GPTQ {cite_009} and AWQ {cite_013} are examples of PTQ.

**Quantization-Aware Training (QAT)**
A method where quantization errors are simulated during the training process (forward pass), allowing the model to learn parameters that are robust to quantization. While often yielding higher accuracy than PTQ, it is computationally expensive for LLMs.

**Systolic Array**
A homogeneous network of tightly coupled data processing units (DPUs). Each unit computes a partial result and passes it to a neighbor. This architecture is highly efficient for matrix multiplications and is the basis for Google's TPU and many FPGA accelerators {cite_018}{cite_024}.

**Zero-Point**
An integer value in the quantized domain that corresponds to the real value zero. It allows the quantization scheme to represent asymmetric ranges (e.g., outputs of ReLU activations).

# Appendix D: Additional Resources and Tools

This appendix curates a list of essential software frameworks, libraries, and hardware development kits referenced throughout the thesis. These resources facilitate the implementation of quantized LLMs and their deployment on integer-only hardware.

## D.1 Quantization Libraries and Frameworks

**GPTQ (Generative Pre-trained Transformer Quantization)**
*Description:* A state-of-the-art algorithm for compressing LLMs to 3 or 4 bits with negligible accuracy loss. The official implementations utilize Hessian-based information to update weights in a layer-wise manner.
*Key Reference:* Frantar et al. {cite_009}
*Relevance:* Essential for deploying 175B+ parameter models on single GPUs.

**LLM.int8() / bitsandbytes**
*Description:* A library enabling 8-bit matrix multiplication for Transformers. It introduces a mixed-precision decomposition to handle activation outliers, allowing 8-bit inference with performance matching 16-bit baselines.
*Key Reference:* Dettmers et al. {cite_006}
*Relevance:* Widely used in the Hugging Face ecosystem for accessible LLM inference.

**AWQ (Activation-aware Weight Quantization)**
*Description:* A hardware-friendly quantization method that scales weights based on activation salience. It avoids the reconstruction overhead of GPTQ and preserves generalist capabilities of instruction-tuned models.
*Key Reference:* Lin et al. {cite_013}
*Relevance:* Gaining popularity for high-throughput serving systems (e.g., vLLM).

**OpenVINO Toolkit**
*Description:* Intel’s toolkit for optimizing and deploying deep learning models on Intel hardware (CPUs, iGPUs, VPUs). It supports model optimization (including quantization) to accelerate inference at the edge.
*Key Reference:* Kapo et al. {cite_032}
*Relevance:* Critical for deploying quantized models on standard CPU architectures found in medical and industrial edge devices.

## D.2 Hardware-Specific Development Tools

**Xilinx Vitis AI**
*Description:* A comprehensive development environment for AI inference on Xilinx hardware platforms, including FPGAs and ACAPs. It includes the Deep Learning Processor Unit (DPU) IP and tools for quantizing models to INT8.
*Key Reference:* Sadr et al. {cite_035}
*Relevance:* Enables the deployment of DCGANs and Transformers on FPGAs with optimized DSP utilization.

**NVIDIA TensorRT**
*Description:* A high-performance deep learning inference SDK. It includes a post-training quantization calibration tool that optimizes kernels for INT8 execution on Tensor Cores.
*Key Reference:* Implied in discussions of GPU acceleration {cite_041}.
*Relevance:* The standard for maximizing throughput on NVIDIA GPUs (e.g., Jetson Orin {cite_034}).

## D.3 Research Datasets and Benchmarks

**GLUE / SuperGLUE**
*Description:* General Language Understanding Evaluation benchmarks. These datasets are standard for evaluating the accuracy degradation of quantized models compared to their full-precision counterparts.
*Key Reference:* Referenced in Q-BERT analysis {cite_011}.

**ImageNet (for Vision Transformers)**
*Description:* While primarily for vision, this dataset is used to benchmark hybrid CNN-Transformer architectures and Diffusion Transformers (DiT) under quantization.
*Key Reference:* Kim et al. {cite_003}, Kim et al. {cite_017}.

## D.4 Further Reading on Hardware Co-Design

For researchers interested in the intersection of hardware architecture and algorithm design:
*   **Systolic Arrays:** Wang et al. {cite_018} and Chang {cite_024} provide in-depth analyses of configuring systolic arrays for GPGPUs and FPGAs.
*   **In-Memory Computing:** Rodriguez {cite_042} explores dynamic cross-layer memory optimizations, a frontier beyond standard quantization.
*   **RISC-V Optimization:** Martínez et al. {cite_043} discuss the specifics of optimizing Transformer decoders for the open RISC-V instruction set architecture.